。改變。

預定題目: 設計一自動販賣機的控制器電路

功能:此控制器具有自動累計輸入金額、控制商品輸出及自動找零等功能。

目前進度: 程式碼verilog-初步完成
              PTT製作-未完成(簡介、狀態圖、設計規格、執行結果)

程式碼

//Design of Finite State Machine as vending machine
//controller. Product price is set as 25. Only five-dollar
//coins and ten-dollar coins are acceptable.

//'timescale 1 ns/1 ns

module EX_404_fsm_vending_vi (clk, reset, five_dollar, ten_dollar, product_release, change_release);

input     clk, reset, five_dollar, ten_dollar;
output    product_release, change_release;
reg       product_release, change_release;

parameter D_0  = 3'b000,
    D_5  = 3'b001,
    D_10 = 3'b010,
    D_15 = 3'b011,
    D_20 = 3'b100,
    D_25 = 3'b101,
    D_30 = 3'b110;

reg   [2:0] payment_state;
reg     five_dollar_d1y1, five_dollar_d1y2;
reg     ten_dollar_d1y1,  ten_dollar_d1y2;
wire    five_dollar_pulse,ten_dollar_pulse;

assign five_dollar_pulse = five_dollar_d1y1 & ~five_dollar_d1y2;
assign ten_dollar_pulse  = ten_dollar_d1y1 & ~ten_dollar_d1y2;

always @(posedge clk or negedge reset)
begin
 if (!reset) begin
    five_dollar_d1y1 <= #1 1'b0;
    five_dollar_d1y2 <= #1 1'b0;
    ten_dollar_d1y1  <= #1 1'b0;
    ten_dollar_d1y2  <= #1 1'b0;
 end
 else begin
    five_dollar_d1y1 <= #1 five_dollar;
    five_dollar_d1y2 <= #1 five_dollar_d1y1;
    ten_dollar_d1y1  <= #1 ten_dollar;
    ten_dollar_d1y2  <= #1 ten_dollar_d1y1;
 end
end

always @(posedge clk or negedge reset) 
begin
 if (!reset) begin
           payment_state   <= #1 D_0;
    product_release <= #1 1'b0;
    change_release  <= #1 1'b0;
 end
 else
   case (payment_state)
     D_0  : begin
       product_release <= #1 1'b0;
       change_release  <= #1 1'b0;
       if (five_dollar_pulse==1'b1)
     payment_state <= #1 D_5;
       if (ten_dollar_pulse==1'b1)
     payment_state <= #1 D_10;
     end
     D_5  : begin
       if (five_dollar_pulse==1'b1)
     payment_state <= #1 D_10;
       if (ten_dollar_pulse==1'b1)
     payment_state <= #1 D_15;
     end
     D_10 : begin
       if (five_dollar_pulse==1'b1)
     payment_state <= #1 D_15;
       if (ten_dollar_pulse==1'b1)
     payment_state <= #1 D_20;
     end
     D_15 : begin
       if (five_dollar_pulse==1'b1)
     payment_state <= #1 D_20;
       if (ten_dollar_pulse==1'b1)
     payment_state <= #1 D_25;
     end
     D_20 : begin
       if (five_dollar_pulse==1'b1)
     payment_state <= #1 D_25;
       if (ten_dollar_pulse==1'b1)
     payment_state <= #1 D_30;
     end
     D_25 : begin
     product_release <= #1 1'b1;
     payment_state   <= #1 D_0;
     end
     D_30 : begin
     product_release <= #1 1'b1;
     change_release  <= #1 1'b1;
     payment_state   <= #1 D_0;
     end
     default : begin
     payment_state   <= #1 D_0;
     product_release <= #1 1'b0;
     change_release  <= #1 1'b0;
     end
 endcase
end
endmodule